Enabling Solutions - Excellence in Signal Integrity Since 1996
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• Power Integrity
 
• Signal Integrity
 
• Parasitic Characterization
 


Package Parasitic/RLGC Extraction (up to 20GHz):

• W-Element
• Broadband Models
• IBIS Models
• Full Package Models

Signal Integrity

Enabling Solutions, Inc. has been involved in providing Signal Integrity analysis services both on-site and off-site to major IDMs and OEMs in the Silicon Valley and in the continental United States. Recent major projects are:

  • Multi-GHz channel analysis of high-speed back planes
  • Signal Integrity of various bus interfaces on dual processor boards such as FSB, DDRI, DDRII, PCI, and PCIE
  • Design rules for multi-bit SerDes channel board layout

All the single-chip packages and SiPs designed at ESI undergo a thorough Signal Integrity review. All SI analysis is done using state of the art SI tools. All package and board layout is rules-driven -- the rules extracted through extensive use of SI analysis.